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ASAHI KASEI
[AKD4386]
AKD4386
Evaluation board Rev.A for AK4386
GENERAL DESCRIPTION The AKD4386 is an evaluation board for the AK4386, the 24bit, 96kHz D/A converter for portable audio and home audio systems. The AKD4386 has the interface with AKM's A/D converter evaluation boards. Therefore, it is easy to evaluate the AK4386. The AKD4386 also has the digital audio interface and can achieve the interface with digital audio systems via opt-connector. Ordering guide
AKD4386 --Evaluation board for AK4386
FUNCTION * Compatible with 2 types of interface - Direct interface with AKM's A/D converter evaluation boards - On-board AK4112B as DIR which accepts optical * BNC connector for an external clock input
+5V
Regulator 3V
VDD
VSS
OPT In
AK4112B (DIR)
LOUT
AK4386
ROUT
Clock Generator
DSP Data 10pin Header
Figure 1. AKD4386 Block Diagram * Circuit diagram and PCB layout are attached at the end of this manual.
-1-
2005/10
ASAHI KASEI
[AKD4386]
Operation sequence
1) Set up the power supply lines. [VDD] (red) = 2.2 3.6V (typ. 3.0V, for VDD pin) [D3V] (red) = 2.2 3.6V (typ. 3.0V, for 74LVC541) [+5V] (orange) = 5V (for regulator) [VCC] (red) = 3.3V (for digital logic) [AGND] (black) = 0V [DGND] (black) = 0V Each supply line should be distributed from the power supply unit. 2) Set-up the evaluation modes, jumper pins and DIP switches (See the followings.) 3) Power on. The AK4386 should be reset once bringing SW2 "L" upon power-up.
Evaluation mode
1) DIR (Optical Link) The AK4112B (DIR) generates MCLK, BICK, LRCK and SDTI from the received data through PORT2 (TORX141: optical link). Used for the evaluation using CD test disk. Nothing should be connected to PORT1 (DSP).
JP5 MCLK JP6 BICK JP7 SDTI JP8 LRCK JP13 EXT
DIR
EXT
DIR
EXT
DIR
EXT
2) Using AKM's evaluation board for ADC To evaluate the AK4386 with analog input, the AKM's evaluation board for ADC can be used. MCLK, BICK and LRCK and A/D converted data are sent to the AKD4386 through PORT1 (DSP) via 10pin flat cable.
JP5 MCLK JP6 BICK JP7 SDTI JP8 LRCK JP13 EXT
DIR
EXT
DIR
EXT
DIR
EXT
3) Feeding all signals from external Under the following set-up, all external signals can be fed through POTR1 (DSP).
JP5 MCLK JP6 BICK JP7 SDTI JP8 LRCK JP13 EXT
DIR
EXT
DIR
EXT
DIR
EXT
-2-
2005/10
ASAHI KASEI
[AKD4386]
Other Jumper pins set up
[JP1] (VDD2): D3V and VCC OPEN: Separated SHORT: Common. (The connector "VCC" can be open.) [JP2] (VDD1): VDD and D3V OPEN: Separated SHORT: Common. (The connector "D3V" can be open.) [JP3] (REG): +5V and VDD OPEN: Separated SHORT: Common. (The connector "VDD" can be open.) The regulator can be supplied 3.0V to all circuits by shorting JP1, JP2 and JP3 and supplying 5V to +5V connector. [JP4] (GND): Analog ground and Digital ground OPEN: Separated SHORT: Common. (The connector "DGND" can be open.) [JP11] (BCFS): Select BICK of the AK4386 x1: BICK=128fs in case of MCLK=256fs/384fs/512fs/768fs. BICK=64fs in case of MCLK=192fs. x2: BICK=64fs in case of MCLK=128fs/256fs/384fs/512fs/768fs. BICK=32fs in case of MCLK=192fs. BICK=128fs in case of MCLK=1024fs/1536fs. x4: BICK=32fs in case of MCLK=128fs/256fs/384fs/512fs/768fs. BICK=64fs in case of MCLK=1024fs/1536fs. x8: BICK=32fs in case of MCLK=1024fs/1536fs. [JP9] (DIV), [JP10] (CLK), [JP12] (LRFS) When using J3 (EXT), these jumper pins should be set according to Table 1.
-3-
2005/10
ASAHI KASEI
[AKD4386]
Example for External Clock setting
Refer to the following setting when MCLK, BICK and LRCK are supplied to the AK4386 from J3 (EXT). Mode fs 8kHz Half 24kHz MCLK JP9 (DIV) JP10 (CLK) 512fs = 4.096MHz x2 x2 768fs = 6.144MHz x3 x2 1024fs = 8.192MHz x2 x2 1536fs = 12.288MHz x3 x2 512fs = 12.288MHz x2 x2 768fs = 18.432MHz x3 x2 1024fs = 24.576MHz x2 x2 1536fs = 36.864MHz x3 x2 256fs = 2.048MHz x1 x2 384fs = 3.072MHz OPEN x3 512fs = 4.096MHz x2 x2 768fs = 6.144MHz x3 x2 256fs = 8.192MHz x1 x2 384fs = 12.288MHz OPEN x3 512fs = 16.384MHz x2 x2 768fs = 24.576MHz x3 x2 256fs = 11.2896MHz x1 x2 384fs = 16.9344MHz OPEN x3 512fs = 22.5792MHz x2 x2 768fs = 33.8688MHz x3 x2 256fs = 12.288MHz x1 x2 384fs = 18.432MHz OPEN x3 512fs = 24.576MHz x2 x2 768fs = 36.864MHz x3 x2 128fs = 6.144MHz OPEN x1 192fs = 9.216MHz OPEN x3 256fs = 12.288MHz x1 x2 384fs = 18.432MHz OPEN x3 128fs = 12.288MHz OPEN x1 192fs = 18.432MHz OPEN x3 256fs = 24.576MHz x1 x2 384fs = 36.864MHz OPEN x3 Table 1. Clock Setting JP12 (LRFS) x1 x1 x2 x2 x1 x1 x2 x2 x1 x1 x1 x1 x1 x1 x1 x1 x1 x1 x1 x1 x1 x1 x1 x1 x1 x3 x1 x1 x1 x3 x1 x1
8kHz
32kHz Norma l 44.1kH z
Default
48kHz
48kHz Double 96kHz
-4-
2005/10
ASAHI KASEI
[AKD4386]
DIP Switch set up
[SW1] : Setting the sampling frequency and de-emphasis filter for the AK4386 No. 1 2 3 Name DFS0 DFS1 DEM OFF ("L") ON ("H") Default OFF ("L") OFF ("L") OFF ("L")
See Table 3 De-emphasis OFF De-emphasis ON Table 2. Mode Setting 1 of SW1
DFS1 L L H H
DFS0 Mode fs L Normal 8kHz 48kHz H Double 48kHz 96kHz L Half 8kHz 24kHz H Auto 8kHz 96kHz Table 3. Sampling Speed for AK4386
Default
[SW5] : Setting the audio interface format for the AK4386 and AK4112B No. 1 2 3 Name DIF0 DIF1 DIF OFF ("L") ON ("H") Default OFF ("L") ON ("H") OFF ("L")
See Table 5 Table 4. Mode Setting 2 of SW5
DIF1 L L H H
DIF0 L H L H
DIF SDTI Format L 16bit, LSB justified H 24bit, LSB justified L 24bit, MSB justified L 16/24bit, I2S Compatible Table 5. Audio Interface Format
Default
Note. The AK4112B does not support 16bit, I2S Compatible.
-5-
2005/10
ASAHI KASEI
[AKD4386]
The function of the toggle SW
[SW2] (PDN): Resets the AK4386. Keep "H" during normal operation. [SW3] (PM): Select power down mode for the AK4386. (See Table 6) MCLK Input PDN pin PM pin DAC Output L L VCOM Voltage L H Hi-Z H L VCOM Voltage H H Normal Output L L VCOM Voltage L H Hi-Z H L VCOM Voltage H H VCOM Voltage Table 6. Power down mode State Power Save Full Power Down Power Save Normal Power Save Full Power Down Power Save Power Save
Mode 0 1 2 3 4 5 6 7
Stop
[SW4] (DIR):
Resets the AK4112B. Keep "H" during normal operation.
Analog Output Circuit
The analog output of the AK4386's DAC outputs from J1 and J2.
LOUT C7 22u R11 10k + R10 220 J1 LOUT
ROUT C8 22u R13 10k
Figure 2. LOUT/ROUT Output circuit
* AKM assumes no responsibility for the trouble when using the above circuit examples.
-6-
+
R12 220
J2 ROUT
2005/10
ASAHI KASEI
[AKD4386]
MEASUREMENT RESULTS
[Measurement condition] * Measurement unit * MCLK * BICK * fs * Bit * Power Supply * Interface * Temperature [Measurement Results] Parameter DAC Analog Output Characteristics S/(N+D) (fs=44.1kHz, 0dBFS) (fs=96kHz, 0dBFS) D-Range (fs=44.1kHz, -60dBFS, A-weighted) (fs=96kHz, -60dBFS) S/N (fs=44.1kHz, A-weighted) (fs=96kHz) Interchannel Isolation Results Lch / Rch 86.3 / 86.1 84.7 / 84.4 100.8 / 100.8 96.1 / 96.1 100.8 / 100.8 96.1 / 96.1 117.3 / 116.4 Unit
: Audio Precision, System Two Cascade : 256fs : 64fs : 44.1kHz, 96kHz : 24bit : VDD = 3.0V : DIR : Room
dB dB dB dB dB dB dB
-7-
2005/10
ASAHI KASEI
[AKD4386]
[DAC Plot : fs=44.1kHz]
AKM AK4386 THD +N vs. Input Level VDD =3.0V, fs=44.1kHz, fin=1kHz
-70 -72.5 -75 -77.5 -80 -82.5 -85 d B r A -87.5 -90 -92.5 -95 -97.5 -100 -102.5 -105 -107.5 -110 -120
-110
-100
-90
-80
-70
-60 dB FS
-50
-40
-30
-20
-10
+0
Figure 1. THD+N vs. Input Level
AKM AK4386 THD +N vs. Input Frequency VDD =3.0V, fs=44.1kHz, Input=0dBFS
-70 -72.5 -75 -77.5 -80 -82.5 -85 d B r A -87.5 -90 -92.5 -95 -97.5 -100 -102.5 -105 -107.5 -110 20
50
100
200
500 Hz
1k
2k
5k
10k
20k
Figure 2. THD+N vs. Input Frequency
-8-
2005/10
ASAHI KASEI
[AKD4386]
AKM
AK4386 Linearity VDD =3.0V, fs=44.1kHz, fin=1kHz
+0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -120
d B r A
-110
-100
-90
-80
-70
-60 dB FS
-50
-40
-30
-20
-10
+0
Figure 3. Linearity
AKM AK4386 Frequency R esponse VDD =3.0V, fs=44.1kHz, Input=0dBFS
+1
+0.8
+0.6
+0.4
+0.2 d B r A -0.2
+0
-0.4
-0.6
-0.8
-1 2k 4k 6k 8k 10k Hz 12k 14k 16k 18k 20k
Figure 4. Frequency Response
-9-
2005/10
ASAHI KASEI
[AKD4386]
AKM
AK4386 Crosstalk (Blue:Rch->Lch, Red:Lch->R ch) VDD =3.0V, fs=44.1kHz, Input=0dBFS
-90
-95
-100
-105
-110 d B
-115
-120
-125
-130
-135
-140 20
50
100
200
500 Hz
1k
2k
5k
10k
20k
Figure 5. Crosstalk
AKM AK4386 FFT Plot VDD =3.0V, fs=44.1kHz, Input=0dBFS, fin=1kHz
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20
50
100
200
500 Hz
1k
2k
5k
10k
20k
Figure 6. FFT Plot (Input = 0dBFS)
- 10 -
2005/10
ASAHI KASEI
[AKD4386]
AKM
AK4386 FFT Plot VD D=3.0V, fs=44.1kHz, Input=-60dBFS, fin=1kHz
+0 -10 -20 -30 -40 -50 -60
d B r A
-70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20
50
100
200
500 Hz
1k
2k
5k
10k
20k
Figure 7. FFT Plot (Input = -60dBFS)
AKM AK4386 FFT Plot VDD =3.0V, fs=44.1kHz, fin=None
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20
50
100
200
500 Hz
1k
2k
5k
10k
20k
Figure 8. FFT Plot (Input = None)
- 11 -
2005/10
ASAHI KASEI
[AKD4386]
[DAC Plot : fs=96kHz]
AKM AK4386 THD +N vs. Input Level VDD=3.0V, fs=96kHz, fin=1kHz
-70 -72.5 -75 -77.5 -80 -82.5 -85 d B r A -87.5 -90 -92.5 -95 -97.5 -100 -102.5 -105 -107.5 -110 -120
-110
-100
-90
-80
-70
-60 dB FS
-50
-40
-30
-20
-10
+0
Figure 9. THD+N vs. Input Level
AKM AK4386 THD +N vs. Input Frequency VDD=3.0V, fs=96kHz, Input=0dBFS
-70 -72.5 -75 -77.5 -80 -82.5 -85 d B r A -87.5 -90 -92.5 -95 -97.5 -100 -102.5 -105 -107.5 -110 20
50
100
200
500 Hz
1k
2k
5k
10k
20k
40k
Figure 10. THD+N vs. Input Frequency
- 12 -
2005/10
ASAHI KASEI
[AKD4386]
AKM
AK4386 Linearity VDD=3.0V, fs=96kHz, fin=1kHz
+0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -120
d B r A
-110
-100
-90
-80
-70
-60 dB FS
-50
-40
-30
-20
-10
+0
Figure 11. Linearity
AKM AK4386 Frequency R esponse VDD=3.0V, fs=96kHz, Input=0dBFS
+1
+0.8
+0.6
+0.4
+0.2 d B r A -0.2
+0
-0.4
-0.6
-0.8
-1 2.5k 5k 7.5k 10k 12.5k 15k 17.5k 20k Hz 22.5k 25k 27.5k 30k 32.5k 35k 37.5k 40k
Figure 12. Frequency Response
- 13 -
2005/10
ASAHI KASEI
[AKD4386]
AKM
AK4386 Crosstalk (Blue:Rch->Lch, Red:Lch->R ch) VDD=3.0V, fs=96kHz, Input=0dBFS
-90
-95
-100
-105
-110 d B
-115
-120
-125
-130
-135
-140 20
50
100
200
500 Hz
1k
2k
5k
10k
20k
40k
Figure 13. Crosstalk
AKM AK4386 FFT Plot VD D=3.0V, fs=96kHz, Input=0dBFS, fin=1kHz
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20
50
100
200
500 Hz
1k
2k
5k
10k
20k
40k
Figure 14. FFT Plot (Input = 0dBFS)
- 14 -
2005/10
ASAHI KASEI
[AKD4386]
AKM
AK4386 FFT Plot VDD =3.0V, fs=96kHz, Input=-60dBFS, fin=1kHz
+0 -10 -20 -30 -40 -50 -60
d B r A
-70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20
50
100
200
500 Hz
1k
2k
5k
10k
20k
40k
Figure 15. FFT Plot (Input = -60dBFS)
AKM AK4386 FFT Plot VDD=3.0V, fs=96kHz, fin=None
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20
50
100
200
500 Hz
1k
2k
5k
10k
20k
40k
Figure 16. FFT Plot (Input = None)
- 15 -
2005/10
ASAHI KASEI
[AKD4386]
Revision History Date 03/07/02 05/10/04 Manual Revision KM072000 KM072001 Board Revision 0 1 Reason First Edition Update Contents
Change of circuit
IMPORTANT NOTICE * These products and their specifications are subject to change without notice. Before considering any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor concerning their current status. * AKM assumes no liability for infringement of any patent, intellectual property, or other right in the application or use of any information contained herein. * Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. * AKM products are neither intended nor authorized for use as critical components in any safety, life support, or other hazard related device or system, and AKM assumes no responsibility relating to any such use, except with the express written consent of the Representative Director of AKM. As used here: (a) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. (b) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. * It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or otherwise places the product with a third party to notify that party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification.
- 16 -
2005/10
A
B
C
D
E
VCC SW1
4 5 6 2
VCC
D3V
DFS0 1 DFS1 2 DEM 3
E
MODE1 R3 R4 R5 47K 47K 47K DFS0 DFS1 DEM L
1
U1A
1 2 3
U1B
4
1
D1 1S1588
R1 10k PDN L
2
D2 1S1588
R2 10k U1C
5 6 9
E
U1D
8
PM
H
3 1
74HC14
74HC14
H
3 1
74HC14
74HC14
SW2 PDN
2
C1 0.1u
2
SW3 PM
C2 0.1u
D3V U2
1
G1
VCC
20
D
C3 0.1u
19 G2 GND 10
D
DIF1
2
A1
Y1
18
PM
3
A2
Y2
17
CN1 R6 51
1 1
U3
CN2
MCLK
4
A3
Y3
16
MCLK
PM
16
16
R7 BICK
5 A4 Y4 15
51
2 2 BICK DIF1 15 15
R8 SDTI
C
51
3 3 SDTI VDD 14 14
6
A5
Y5
14
VDD
C
R9 LRCK
7 A6 Y6 13
51
4 4 LRCK VSS 13
C4 + 0.1u
C5 10u
13
PDN
8
A7
Y7
12
5
5
PDN
VCOM
12
DIF0
9
A8
Y8
11
DFS0
6
6
DFS0
LOUT
11
11
+
74LVC541A
DFS1
7
7
DFS1
ROUT
10
DEM
8
8
DEM
DIF0
9
+
B
AK4386
VCC
D3V
VDD
OUT
GND
For 74HC14 x 1, 74HCT04 x 1, 74AC74 x 1, 74HC4040 x 1, 74AC163 x 1, 74HC14 x 1
JP1 VDD2
L1 (short)
JP2 VDD1
L2 (short)
JP3 REG
D3V
A
VDD C15 47u + C16 + 47u
C30 0.1u
C29 0.1u
C28 0.1u
C27 0.1u
C12 0.1u
C13 0.1u
C14 47u
+
C9 0.1u
A
B
C
+ +
C6 10u
12
R10 220
J1 LOUT
C7 22u
10
R11 10k
9
R12 220
J2 ROUT
B
C8 22u
R13 10k
+5V
T1 TA48M03F
IN
DGND +
JP4 GND
AGND
C10 C11 0.1u 47u
A
Title Size Document Number
AKD4386 Rev.A
AK4386
Sheet
E
Rev
A3
Date:
D
1 1
of
Tuesday, October 04, 2005
3
A
B
C
D
E
E
E
VCC
1
U4
MCLK
DVDD
CM0/CDTO
28
C17 10u C19 10u
D
+
C18 0.1u
2 DVSS CM1/CDTI 27
BICK LRCK SDTI EXT
4
C20 0.1u
3 TVDD OCKS1/CCLK 26
VCC
C21 5p
5 XTI MCKO1 24
2
1
D3 1S1588
R14 10k U1F
13 12 11
U1E
10
C22 5p
7 PDN DAUX 22
L
3 1
H SW4 DIR
2
74HC14
74HC14
C23 0.1u C24 10u
C
+
VCC PORT2
VCC GND OUT 3 2 1
L3 47u C26 0.1u
DIR
B
VCC SW5
1 2 3 4 5 6
DIF0 DIF1 DIF
MODE2 R18 R19 R20 47K 47K 47K DIF0 DIF1 U5D 74HCT04
9 8
A
A
B
+ 18k
EXT_MCLK
V/TX
OCKS0/CSN
25
X1 11.2896MHz
6 XTO MCKO2 23
DIR
JP5 MCLK
MCLK BICK LRCK SDTI
PORT1
1 2 3 4 5 10 9 8 7 6
D
DSP
EXT
EXT_BICK
R15
8 R BICK 21
DIR
20
JP6 BICK JP7 SDTI EXT JP8 LRCK EXT_LRCK
C
9
AVDD
SDTO
C25 0.1u
10 AVSS LRCK 19
R16
11 RX1 ERF 18 1
U5A
2
R17
2
LED1
1
VCC
DIR
470
12 RX2/DIF0 FS96 17
74HCT04
1k
ERF
13
RX3/DIF1
P/S
16
14
RX4/DIF2
AUTO
15
AK4112B
3
U5B 74HCT04
4
B
U5C 74HCT04
5 6
U5E 74HCT04
11 10
U5F 74HCT04
13 12
A
Title Size Document Number
AKD4386 Rev.A
DIR
Sheet
E
Rev
A3
Date:
C D
1 2
of
Tuesday, October 04, 2005
3
A
B
C
D
E
E
E
VCC
D
EXT_MCLK U6A 74AC74
Q 5
D
10
U6B 74AC74
Q 9
CL
J3 EXT
D CLK
PR
12 11
x1 x2 x3
JP9
3
D CLK
PR
2
4
Q
6
x1 x2 x3
JP10
10 11
U7
CLK RST Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 9 7 6 5 3 2 4 13 12 14 15 1
1
DIV
CL Q 8 13
CLK
x1 x2 x4 x8
JP11 EXT_BICK BCFS x3 x1 x2 JP12 EXT_LRCK LRFS
C
R21 51 JP13 EXT
C
U8
3 4 5 6 7 10 2 9 1 A B C D ENP ENT CLK LOAD CLR QA QB QC QD RCO 14 13 12 11 15
74HC4040
74AC163
2
1
U9A 74HC14
B
B
4
3
U9B 74HC14
6 5
U9C 74HC14
8 9
U9D 74HC14
10 11
U9E 74HC14
12
A
13
U9F 74HC14
Title Size Document Number
A
AKD4386 Rev.A
External Clock
Sheet
E
Rev
A3
Date:
A B C D
1
of
Tuesday, October 04, 2005
3
3

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